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The SSE‑200 subsystem provides the following pre-assembled elements to use as the basis of an IoT SoC:
Two Cortex®-M33 processors that must be separately licensed.
AMBA AHB5 bus matrix for internal and expansion buses.
CoreSight™ debug and trace that must be separately licensed.
CoreLink™ SIE-200 and CMSDK components.
Power, clock, and reset control infrastructure.
For details of the separately licensed Cortex-M33 processor, see the Arm® Cortex®-M33 Processor Technical Reference Manual.
For details of the SIE-200 components, see the Arm® CoreLink™ SIE-200 Technical Reference Manual.
The SSE‑200 is complemented by software libraries that are integrated with the Mbed™ operating system.
The provided system components only form part of the finished SoC and Arm expects system designers to extend and customize the subsystem for their application requirements.
The following figure shows a block diagram of the SSE‑200 elements: