3.6.6 CMSDK Watchdog timer

The System Control element implements a CMSDK Watchdog timer running on the S32KCLK clock. This watchdog timer is mapped to a secure region and is able to raise an NMI interrupt to both cores in the system.

The System Control element implements:

  • A single CMSDK Timer that resides in a Non-secure region at 0x4002_F000 and in a Secure region at 0x5002_F000.
  • A single CMSDK Watchdog that resides in the Secure region at 0x5002_E000.

See 3.4.3 CMSDK watchdog timers for a summary of the control registers.

Non-ConfidentialPDF file icon PDF version101104_0200_00_en
Copyright © 2016–2018 Arm Limited or its affiliates. All rights reserved.