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The System Control element implements a CMSDK Watchdog timer running on the S32KCLK clock. This watchdog timer is mapped to a secure region and is able to raise an NMI interrupt to both cores in the system.
The System Control element implements:
0x4002_F000and in a Secure region at
See 3.4.3 CMSDK watchdog timers for a summary of the control registers.