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The Crypto element provides the following features:
Protection of various assets belonging to the IC or device manufacturer, service operators providing services over the target device and the user itself. These asset protection features include:
Image verification at boot or during runtime.
The CryptoCell-312 implements several key interfaces that are visible to software:
Two APB4 interfaces, and both interface to the base system through Access Control gates and reside at the following address in the main memory map:
APB Configuration Interface at aliased address regions
. This interface provides access to registers that are visible to the programmer within CryptoCell-312, the CryptoCell-312 SRAM, and the NVM. CryptoCell-312 itself handles security checking of accesses to its registers on its own.
. This interface provides access to the non-CryptoCell-312 part of the NVM memory, with word address of
0x1FFC. Note the address offset of
0xA0being applied to the APB address.
A single AHB-Lite bus master interface that connects to the base system using an ACG, with access only to the following address spaces:
Code AHB5 Master Expansion Interface, at addresses
For more information on the CryptoCell-312 , see the Arm® TrustZone® CryptoCell-312 Technical Reference Manual.