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Low-power operation is essential for IoT endpoint devices that might rely on a battery or on harvested energy. SSE-200 uses two key methods to reduce the overall power of the system:
Each power domain is controlled by a Power Integration Kit (PIK) that performs the following:
The PIK of each domain is primarily designed to deal with the power control of its associated power domain. However, some power domains are aware of the power state of other power domains, to maintain the correct operation of the system. The Power Dependency Control Matrix (PDCM) enables software to configure the relationship between each power domain.
The following figure shows the power control infrastructure of SSE-200, containing multiple power domains, each with its associated PIK and how they are connected to the PDCM.
For power-management signals, see A.1 Clock, reset, and power control signals.
SSE-200 subsystem defines the following power domains:
N>, SRAM macros power domains.
PD_AON, which is the AON domain.
Anything that is not in the other domains, is in the PD_AON power domain.
If a separate processor debug power domain is not supported, then PD_CPU0DBG and PD_CPU0CORE power domains are merged into PD_CPU0CORE, and PD_CPU1DBG and PD_CPU1CORE power domain are merged into PD_CPU1CORE.
The following figure shows how the power domains map onto the elements.