3.4.2 CMSDK dual timer

CTI triggers from the debug subsystem halt the timers.

nWARMRESETSYS reset the timers, which reside in the PD_SYS power domain.

The base element has a single CMSDK DUAL TIMER in Non-secure region at 0x4000_2000 and in Secure region at 0x5000_2000.

See the Arm® Cortex®-M System Design Kit Technical Reference Manual for register details for the dual timer.

Table 3-21 Summary of CMSDK Dual Timer registers

Offset Name Access Width Reset value Description
0x00 TIMER1LOAD RW 32 0x0 The value from which the counter is to decrement.
0x04 TIMER1VALUE RO 32 0xFFFFFFFF The current value of the decrementing counter.
0x08 TIMER1CONTROL RW 8 0x20 Timer interrupt and enable control.
0x0C TIMER1INTCLR WO - - Any write clears the interrupt output from the counter.
0x10 TIMER1RIS RO 1 0x0 Indicates the raw interrupt status from the counter.
0x14 TIMER1MIS RO 1 0x0 Indicates the masked interrupt status from the counter.
0x18 TIMER1BGLOAD RW 32 0x0 Contains the value from which the counter is to decrement.
0x20 TIMER2LOAD RW 32 0x0 The value from which the counter is to decrement.
0x24 TIMER2VALUE RO 32 0xFFFFFFFF The current value of the decrementing counter.
0x28 TIMER2CONTROL RW 8 0x20 Timer interrupt and enable control.
0x2C TIMER2INTCLR WO - - Any write clears the interrupt output from the counter.
0x30 TIMER2RIS RO 1 0x0 Indicates the raw interrupt status from the counter.
0x34 TIMER2MIS RO 1 0x0 Indicates the masked interrupt status from the counter.
0x38 TIMER2BGLOAD RW 32 0x0 Contains the value from which the counter is to decrement.
0xF00 TIMERITCR RW 1 0x0 Enables integration test mode. When in this mode, the Integration Test Output Set Register directly controls the masked interrupt outputs.
0xF04 TIMERITOP WO 2 0x0 When in integration test mode, the values directly drive the enabled interrupt outputs.
0xFD0 TIMERPERIPHID4 RO 8 0x04

Peripheral ID Register 4:

[7:4]: Block count.

[3:0]: jep106_c_code.

0xFD4 TIMERPERIPHID5 RO 8 0x00 Peripheral ID Register 5.
0xFD8 TIMERPERIPHID6 RO 8 0x00 Peripheral ID Register 6.
0xFDC TIMERPERIPHID7 RO 8 0x00 Peripheral ID Register 7.
0xFE0 TIMERPERIPHID0 RO 8 0x23

Peripheral ID Register 0:

[7:0]: Part number[7:0].

0xFE4 TIMERPERIPHID1 RO 8 0xB8

Peripheral ID Register 1:

[7:4]: jep106_id_3_0.[3:0]: Part number[11:8].

0xFE8 TIMERPERIPHID2 RO 8 0x1B

Peripheral ID Register 2:

[7:4]: Revision.

[3]: jedec_used.

[2:0]: jep106_id_6_4.

0xFEC TIMERPERIPHID3 RO 8 0x00

Peripheral ID Register 3:

[7:4]: ECO revision number.

[3:0]: customer modification number.

0xFF0 TIMERPCELLID0 RO 8 0x0D Component ID Register 0.
0xFF4 TIMERPCELLID1 RO 8 0xF0 Component ID Register 1.
0xFF8 TIMERPCELLID2 RO 8 0x05 Component ID Register 2.
0xFFC TIMERPCELLID3 RO 8 0xB1 Component ID Register 3.
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