2.1.3 Interface signals

The SSE-200 has the following interfaces at the boundary of the subsystem to allow customers to customize the subsystem:

  • Clock and reset.
  • Processor-related signals:

    • Processor control.

    • Interrupts.
    • Configuration signals.
  • Base element:

    • AHB expansion.

  • System control:

    • Static configuration signals.

    • Power control expansion interfaces.
    • External Wakeup Controller interrupt inputs.
  • Debug and Trace:

    • Debug access.

    • Timestamp.
    • Cross Trigger Channel.
    • Debug APB expansion.
    • ATB Trace.
    • Debug authentication.
  • Crypto: This element integrates the CryptoCell-312 into the system to provide cryptographic acceleration. This element is optional, and it includes:

    • NVM APB interface.

    • Debug Control Unit (DCU) signals.
    • Life Cycle State (LCS) signals.
  • Security.
  • Top-level static configuration signals.
Non-ConfidentialPDF file icon PDF version101104_0200_00_en
Copyright © 2016–2018 Arm Limited or its affiliates. All rights reserved.