2.2.5 Component clocks

The elements use the system clocks as follows:

SRAM element

Each SRAM runs on one clock. Most run on SYSSYSCLK. One SRAM is fixed on SYSFCLK instead of SYSSYSCLK.

The SRAM element implements local dynamic clock control to further reduce the amount of time the clock is active when the element is idle.

CPU element

Each CPU element runs on a single clock:

  • The primary core runs on SYSCLK.
  • The secondary core runs on FCLK.

Because the Cortex®‑M33 processor has its own clock gating control, the Cortex‑M33 cores require an ungated clock to be supplied to each core.

The PPU can gate the clock to the rest of the CPU element, including the instruction cache and the ACG, for power management. Additional dynamic clock control is combined with Cortex‑M33 processor clock enable output to further reduce the amount of time the clock is active when the element is idle.

Base element

The base element requires both FCLK and SYSCLK.

The PPU gates each clock for power management.

The base element locally implements dynamic clock control to further reduce the amount of time each clock is active when the element is idle. These clocks are available for expansion use as the SYSFCLK, SYSSYSCLK, SYSSYSUGCLK, and SYSFUGCLK clock outputs.

Debug element

The debug element requires both FCLK and SYSCLK.

The PPU gates each clock for power management.

The debug element does not implement dynamic clock control. The local clocks are running whenever the element is powered ON. These clocks are available for expansion use as the DEBUGFCLK and DEBUGSYSCLK clock outputs.

System control element

The system control element requires S32KCLK, FCLK, and SYSCLK.

Because the control element is in the always-on power domain, the element does not have a PPU to gate clocks.

The element implements dynamic clock control for SYSCLK to reduce the amount of time SYSCLK clock is active when the element is idle.

Crypto element

The CryptoCell, if present, runs on SYSCLK.

The PPU gates SYSCLK for power management.

The Crypto element locally implements dynamic clock control to further reduce the amount of time the clock is active when the element is idle. This clock is available for NVM Interface expansion use as the CRYPTOSYSCLK.

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