2.5.3 AHB5 bus matrix

The bus matrix connects AHB5 components through its slave and master ports.

The following table lists the bus matrix slave ports.

Table 2-6 AHB5 bus matrix slave ports

Port number Slave port
S0 CPU0 Code AHB Interface
S1 CPU0 System AHB Interface
S2 CPU1 Code AHB Interface
S3 CPU1 System AHB Interface
S4 CryptoCell AHB interface
S5 Debug certificate AHB Interface
S6 Slave Expansion0 AHB Interface
S7 Slave Expansion1 AHB Interface

The following table lists the bus matrix master ports and their connections to the slave ports.

Table 2-7 AHB5 bus matrix master ports

Master port S0 S1 S2 S3 S4 S5 S6 S7
AHB Master Expansion Code Interface Y - Y - Y - Y  
AHB Master Expansion 0 Interface - Y - Y Y - Y Y
AHB Master Expansion 1 Interface - Y - Y - - Y Y
SRAM0 AHB Interface - Y - Y Y Y Y Y
SRAM1 AHB Interface - Y - Y Y - Y Y
SRAM2 AHB Interface - Y - Y Y - Y Y
SRAM3 AHB Interface - Y - Y Y - Y Y
CryptoCell code APB Y - Y - - - Y  
CryptoCell configuration APB - Y - Y - - Y Y
All other system control and peripherals - Y - Y - - Y Y

Note:

Paths to CryptoCell only exist if the associated Crypto element exists.
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