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The SSE-200 contains the following hardware components:
Two Cortex®-M33 processors:
For more information, see the Arm® Cortex®-M33 Processor Technical Reference Manual.
Secure AMBA® interconnect:
Multiple banks of SRAM.
One bank of SRAM functions as Tightly Coupled Memory (TCM).
APB peripherals with security support:
Three general-purpose timers with configurable security. One timer is on the 32KHz domain and two are on the SYSCLK domain.
Power Dependency Control Matrix (PDCM).