2.4.2 Interface to the External components

This section describes the interface to the External components for each variant.

Interface to the External APBCOM

For ADIv6-compliant systems, the APB interface connects the External APBCOM to the Debug Port (DP) through APB infrastructure components. It is preferable for the External APBCOM to be high in the APB infrastructure hierarchy.

Note:

  • The SDC-600 can be connected lower in the hierarchy for Arm® CoreSight™ SoC-600 implementations. However, in this case all elements on the route to the External APBCOM must be accessible without any authentication. Otherwise, the communication is blocked.
  • See 3.2 Control and Status Register Map for sdc600_apbcom_ext for address map configuration.

The External APBCOM also has a DP_ABORT signal. An abort request causes the External APBCOM to terminate the current transaction. Abort requests only affect APB write transactions to the Data Blocking Register (DBR) stalled by a transaction still in progress on the CWI Tx interface. Other transactions, which are guaranteed to complete in a finite amount of time, ignore the abort and are allowed to complete normally.

When an abort occurs:

  • The aborted transaction returns an APB error response and sets the TRINPROG bit in the Status Register.
  • If SR.TRINPROG is set, any further writes to DR or DBR registers return error responses until the bit is cleared. The TRINPROG bit is cleared when the transaction that was in progress on the CWI Tx interface when the abort request was received is completed.
  • Transactions on the CWI are not affected.

Interface to the COM-AP

For ADIv5.2-compliant systems, the DAPBUS interface connects the COM-AP to the Debug Port (DP) through the DAPBUS Interconnect (DAPIC).

The COM-AP has the DAPABORT signal, which is part of the DAPBUS interface and has the same functionality as the DP_ABORT with APB.

Note:

Arm recommends that you connect the SDC-600 to the DAPIC in the hierarchy for Arm CoreSight SoC-400 implementations. All elements on the route to the COM-AP must be accessible without any authentication. Otherwise, the communication is blocked.

See 3.3 Control and Status Register Map for sdc600_comap for address map configuration.

Interface to the APBCOM for Integrated Cortex-M DAP

For Integrated Cortex-M DAP-compliant systems, the APBCOM for Integrated Cortex-M DAP is connected to the Integrated Cortex-M DAP module through the Debug Splitter. DP_ABORT is not implemented in Integrated Cortex-M DAP systems.

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