2.3 Hardware components

In a typical configuration, the SDC-600 Secure Debug Channel contains one External component and one Internal APBCOM component, with one or more COM asynchronous bridges in between.

The SDC-600 contains the following:

  • An Internal APBCOM, which is used by the servicing agent and recognized as a peripheral device. The internal side contains the following interfaces:
    • An IRQ output, which can send an interrupt to the servicing agent.
    • An APB4 slave.
    • Two Q-Channel interfaces: one for clock and one for power.
    • Two COM wire interfaces: one for the Rx direction and one for the Tx direction.
  • An External component, which is used on the debugger side and recognized as a special access port (COM-AP) or as a CoreSight™ peripheral device (APBCOM) by the debugger. This component has three different variants depending on the debug infrastructure version:
    • The External APBCOM component, which is used in ADIv6-compliant systems.
    • The External APBCOM for Integrated Cortex-M DAP component, which is used in Integrated Cortex-M DAP systems. This component is a CoreSight ROM table that includes COM functionality.
    • The External COM-AP component, which is used in ADIv5.2-compliant systems.
    The external side contains the following interfaces:
    • Powerup and Reboot Request interfaces, which can request power for the internal side and the optional bridges as well as to send a request to reboot the servicing agent.
    • A DP_ABORT input in ADIv6-compliant systems. An abort request causes the external side to terminate an ongoing transaction and free up its APB slave interface. In ADIv5.2-compliant systems, DAPBUS is used instead.

      Note:

      The Integrated Cortex-M DAP variant does not have this interface.
    • An APB4 slave. In ADIv5.2-compliant systems, DAPBUS is used instead.
    • A Q-Channel interface for the clock.
    • Two COM wire interfaces: one for the Rx direction and one for the Tx direction.
    • An Authentication interface, which is only available in the APBCOM for Integrated Cortex-M DAP component.
  • COM asynchronous bridges, which transfer data between two different clock or power domains. The COM asynchronous bridges have the following interfaces:
    • Two COM wire interfaces on each side: one for the Rx direction and one for the Tx direction.
    • Two clock LPIs.
    • The Indirect Bridge also has two power LPIs.
  • The Debug Splitter, which is required in a debug subsystem that cannot be extended by an additional Access Port (AP) or in a system that uses Integrated Cortex-M DAP. The Debug Splitter intercepts the AP downstream interface, and splits it into a downstream interface for the SDC-600 and another downstream interface for the rest of the system. The Debug Splitter contains:
    • A target slave multiplexer interface, which provides one slave interface and three master interfaces.
    • A low-latency synchronous interface bridge, which includes a slave target interface and an APB4 master interface.
    • A default slave interface.

    Note:

    The Debug Splitter component is not needed if the SDC-600 is implemented in an extendable debug system that is ADIv6 or ADIv5.2 compliant.

The following table shows which components are required for each variant:

Component ADIv6 ADIv5.2 Integrated Cortex-M DAP

External APBCOM

sdc600_apbcom_ext

Required - -

COM-AP

sdc600_comap

- Required -

External APBCOM for Integrated Cortex-M DAP

sdc600_apbcom_ext_rom

- - Required

Internal APBCOM

sdc600_apbcom_int

Required Required Required

COM asynchronous bridge

sdc600_comasyncbridge_direct_half_ext

sdc600_comasyncbridge_direct_half_int

sdc600_comasyncbridge_indirect_half_ext

sdc600_comasyncbridge_indirect_half_int

Optional Optional Optional

Debug Splitter

sdc600_debugsplitter

- - Required
This section contains the following subsections:
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