1.7 Product revisions

This section describes the differences in functionality between product revisions of Arm SDC-600.

r0p1
First release of SDC-600.
r0p2
The following changes have been made in this release:
  • The APB interfaces received a register stage to improve timing performance.
  • The ports on the bridge internal interface have been renamed.
  • The sdc600_debugsplitter signals have been changed.
  • An additional Power LPI Q-Channel interface has been added to the external side of the sdc600_comasyncbridge_indirect. Therefore both bridge sides now have their own Power LPI interface.
  • The Power LPI Q-Channel interface has been removed from the sdc600_comap, sdc600_apbcom_ext, and the sdc600_apbcom_ext_rom components. Power is secured through the powerup request interface of the debug infrastructure above in the hierarchy.
  • The parameter TIE_OFF_PRESENT has been removed from sdc600_apbcom_ext_rom. Now, the revision and ID parameters must be set to valid values by the implementer.
  • The parameter ROM_TABLE_PTR on sdc600_debugsplitter has been renamed to ROM_ENTRY0 and extended to 32 bits to be aligned with other ROM tables.
  • The EXT_PWR_WAKE signal has been added to both sides of sdc600_comasyncbridge_indirect.
  • The DP_ABORT, PSLVERR, and PWAKEUP signals have been removed from the sdc600_apbcom_ext_rom component.
  • The Internal APBCOM module now waits for the active clock to be confirmed on CLK LPI before accepting the PWR LPI state change request.
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