3.7.1 Integration Mode Status Register

This register is used for the Integration Test DP Abort Status.

The ITSTATUS characteristics are:

Usage constraints
There are no usage constraints.
Only available in the ADIv6 variant.
32-bit read-only memory-mapped register.

The following figure shows the bit assignments.

Figure 3-13 ITSTATUS bit assignments
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The following table shows the bit assignments.

Table 3-15 ITSTATUS bit assignments

Bits Name Function
[31:1] - res0.
[0] DPABORT In integration testing mode, when ITCTRL.IME = 1, this bit latches to 1 on the rising edge of DP_ABORT. The possible values of this bit are:

No rising edge of DP_ABORT has been detected.


Rising edge has been detected on DP_ABORT.

This bit is cleared on APB read from this register. If DP_ABORT rises in the same cycle when an APB read of the ITSTATUS register is received, the APB read takes priority and the register is cleared as a result.

In mission mode, when ITCTRL.IME = 0, this register is RAZ/WI.

This bit resets to 0x0.

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