A.5.2 Internal indirect half bridge signals

The following tables show the signals for the internal indirect half bridge.

Table A-34 Internal indirect half bridge system signals

Name Direction Description
CLK_INT Input Clock for the internal side of the bridge. All signal timings are related to the rising edge.
RESETN_INT Input Active-LOW reset for CLK_INT domain.

Table A-35 Internal indirect half bridge COM-TX signals

Name Direction Description
INT_TX_DATA[7:0] Output Transmit data to the Internal APBCOM.
INT_TX_VALID Output Data valid.
INT_TX_READY Input Data accepted.
INT_TX_LINKUP Input Linkup indicated by the Internal APBCOM to the External component.
INT_TX_LINKEST Output Link established from the External component to the Internal APBCOM.

Table A-36 Internal indirect half bridge COM-RX signals

Name Direction Description
INT_RX_DATA[7:0] Input Receive data from Internal APBCOM.
INT_RX_VALID Input Data valid.
INT_RX_READY Output Data accepted, ready delivered by bridge.
INT_RX_LINKUP Output Linkup indicated by the External component to the Internal APBCOM.
INT_RX_LINKEST Input Link established from the Internal APBCOM to the External component.

Table A-37 Internal indirect half bridge asynchronous COM External to Internal signals

Name Direction Description
INT_ASYNC_EI_REQ Input Receive data available handshake signal.
INT_ASYNC_EI_ACK Output Receive data captured handshake signal. The reset value is LOW.
INT_ASYNC_EI_DATA[7:0] Input Receive data.
INT_ASYNC_EI_LINKEST Input Link established from the External component to the Internal APBCOM.
INT_ASYNC_EI_LINKUP Output Linkup indicated by the Internal APBCOM to the External component. The reset value is LOW.

Table A-38 Internal indirect half bridge asynchronous COM Internal to External signals

Name Direction Description
INT_ASYNC_IE_REQ Output Transmit request handshake signal. The reset value is LOW.
INT_ASYNC_IE_ACK Input Transmit acknowledge handshake signal.
INT_ASYNC_IE_DATA[7:0] Output Transmitted data. The reset value is LOW.
INT_ASYNC_IE_LINKEST Output Link established from the Internal APBCOM to the External component. The reset value is LOW.
INT_ASYNC_IE_LINKUP Input Linkup indicated by the External component to the Internal APBCOM.

Table A-39 Internal indirect half bridge Clock Q-Channel signals

Name Direction Description
INT_CLK_QREQ_N Input Asynchronous quiescence request signal for CLK_INT.
INT_CLK_QACCEPT_N Output When LOW, the quiescent request is accepted for CLK_INT.
INT_CLK_QDENY Output When HIGH, the quiescent request is denied for CLK_INT.
INT_CLK_QACTIVE Output When HIGH, indicates to the controller that the component requires the clock on CLK_INT.

Table A-40 Internal indirect half bridge Power Q-Channel signals

Name Direction Description
INT_PWR_QREQ_N Input Asynchronous quiescence request signal for power down.
INT_PWR_QACCEPT_N Output When LOW, the quiescent request is accepted for power down.
INT_PWR_QDENY Output When HIGH, the quiescent request is denied for power down.
INT_PWR_QACTIVE Output When HIGH, indicates to the controller that the component requires power.
INT_PWR_WAKE Output Auxiliary signal that can be used by the system to wake up the domain. It is directly connected to INT_PWR_QACTIVE.
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