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This is the external-side APBCOM component for systems with Integrated Cortex-M DAP.
This component provides APB access to a duplex COM Wire Interface (CWI) link for low-bandwidth communication.
It is a CoreSight™ ROM Table that includes COM functionality and is recognized by the debugger as such. The ROM table entry is used in the CoreSight discovery process, and would normally point to the debug components of the attached processor core. The single entry in this ROM table must be configured to point to the target processor core's ROM table.
It has Powerup and Reboot Request interfaces to request power for the internal side or to send a request to reboot the servicing agent.
This component uses an APB bus. The following figure shows the port connections:
See 3.4 Control and Status Register Map for sdc600_apbcom_ext_rom for information about the address map configuration.