2.4.1 P2Q configuration parameters

There are multiple configuration parameters that modify the functionality of the P-Channel to Q-Channel Converter.

The following table shows the P2Q configuration parameters.

Table 2-4 P2Q configuration parameters

Parameter Possible settings Default Description
CTRL_P_CH_PWR_PSTATE_MAP[15:0] 0 or 1, for each bit 0b00000001_11110000

The value of the ctrl_pstate_i[3:0] input signal represents one of 16 possible power modes. This parameter assigns a single bit to each power mode. Therefore, you can select the device Q-Channel to be in the running or quiescent state, for each power mode:

0 = The Q-Channel is quiescent, or quiescence is requested if it is active.

1 = The Q-Channel is running, or requested to be running if it is quiescent. However, this state only occurs if CTRL_P_CH_OP_PSTATE_MAP[X] == 1, where X is the P-Channel operating mode, which ctrl_pstate_i[7:4] supplies.

For example, if CTRL_P_CH_PWR_PSTATE_MAP[5] == 0, then when ctrl_pstate_i[3:0] == 0b0101, the Q-Channel is quiescent or quiescence is requested if it is active.

CTRL_P_CH_OP_PSTATE_MAP[15:0] 0 or 1, for each bit 0b00000001_11110000

The value of the ctrl_pstate_i[7:4] input signal represents one of 16 possible operating modes. This parameter assigns a single bit to each operating mode. Therefore, you can select the Q-Channel to be in the running or quiescent state, for each operating mode:

0 = The Q-Channel is quiescent, or quiescence is requested if it is active.

1 = The Q-Channel is running, or requested to be running if it is quiescent. However, this state only occurs if CTRL_P_CH_PWR_PSTATE_MAP[X] == 1, where X is the P-Channel power mode, which ctrl_pstate_i[3:0] supplies.

For example, if CTRL_P_CH_OP_PSTATE_MAP[7] == 0, then when ctrl_pstate_i[7:4] == 0b0111 the Q-Channel is quiescent or quiescence is requested if it is active.

CTRL_P_CH_PACTIVE_MAP[31:0] 0 or 1, for each bit 0xFFFFFFFF

This parameter controls whether the Q-Channel dev_qactive_i drives each bit in the ctrl_pactive_o[31:0] output:

0 = The corresponding bit in ctrl_pactive_o[31:0] is tied LOW.

1 = The corresponding bit in ctrl_pactive_o[31:0] is set to the value of dev_qactive_i.

CTRL_P_CH_SYNC 0, 1 1

0 = A synchronizer is not present on the ctrl_preq_i input.

1 = A synchronizer is present on the ctrl_preq_i input.

DEV_Q_CH_SYNC 0, 1 1

0 = Synchronizers are not present on the dev_qacceptn_i or dev_qdeny_i inputs.

1 = Synchronizers are present on the dev_qacceptn_i and dev_qdeny_i inputs.

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