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|Home > Functional Description, AHB5 to AXI5 bridge > Burst translation|
For most of the AHB burst types, the AHB5 to AXI5 bridge can perform a simple translation to create the AXI burst. However, the bridge requires extra logic to cope with undefined length bursts and early burst termination.
The bridge converts Modifiable undefined length incremental bursts to transactions of burst length 1 or burst length 4. The INCR_BURST_CONV Verilog parameter controls the length of the AXI burst.
If INCR_BURST_CONV is set to a burst length of four and the AHB master prematurely stops the burst, then the bridge still completes the four bursts, except:
If an AHB read burst is terminated early, the bridge completes the remainder of the burst but it discards the extra read data.
If an AHB write burst is terminated early, the bridge sets the byte strobes to zero and it discards the extra write response. If the discarded write response contains an error, the bridge pulses the buf_write_error_irq interrupt signal for 1 clk cycle.
An AHB burst might terminate prematurely because: