2.2 MSC configuration options
The MSC has design options that configure some AXI signal widths and the presence of synchronization logic on the Q-Channel inputs.
When implementing the MSC in an SoC, you can configure:
- The width of the AXI data bus, by using the DATA_WIDTH parameter. The possible widths are 32, 64, 128, or 256 bits.
- The width of the ID signals on the AXI interfaces, by using the ID_WIDTH parameter. The parameter can be set to a value from 2-32 inclusive.
- The width of the User signals on each AXI channel, by using the ARUSER_WIDTH, AWUSER_WIDTH, BUSER_WIDTH, RUSER_WIDTH, and WUSER_WIDTH parameters. A parameter can be set to a value from 0-256 inclusive.
- The presence of a synchronizer on the Q-Channel QREQn inputs. See 2.4 MSC Q-Channels.