7.3.11 Interrupt set register, IRQ_SET

The IRQ_SET register sets the interrupt. This register is intended for debug purposes only.

Usage constraintsAccessible only from Secure state.
ConfigurationsAvailable in all configurations.
AttributesSee 7.2 Register summary.

The following figure shows the bit assignments.

Figure 7-11 IRQ_SET bit assignments
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The following table shows the bit assignments.

Table 7-12 IRQ_SET bit assignments

Bits Name Default Description
[31:1] - - Reserved.
[0] IRQ_SET -

This bit sets the interrupt:

0 = The MPC ignores the write, so the interrupt state remains unchanged.

1 = The MPC sets the interrupt by:

  • Setting IRQ_STAT.IRQ_STAT = 1.
  • Setting the irq signal HIGH, if IRQ_EN.IRQ_EN == 1.

    Note:

    When the MPC sets the interrupt, it does not alter the value of the IRQ_INFO1 and IRQ_INFO2 registers.
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