7.3.1 Control register, CTRL

The CTRL register can lock down the programming configuration of the MPC. It also enables the BLK_IDX autoincrement and controls the AXI response when software gates AXI transactions.

Usage constraintsAccessible only from Secure state. If SEC_CFG_LOCK == 1, then the register is read-only, which also prevents software from gating AXI transactions. See 7.4 Gating AXI transactions during register updates.
ConfigurationsAvailable in all configurations.
AttributesSee 7.2 Register summary.

The following figure shows the bit assignments.

Figure 7-1 CTRL bit assignments
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The following table shows the bit assignments.

Table 7-2 CTRL bit assignments

Bits Name Default Description
[31] SEC_CFG_LOCK 0

Security configuration lockdown.

When set to 1, CTRL, BLK_LUT, IRQ_EN and IRQ_SET become read-only registers. To set this bit to 0, the MPC must be reset. See 7.6 Configuration lockdown.

[30:24] - - Reserved, RAZ/WI.
[23] GATE_PRESENT GATE_PRESENT

This read-only bit returns the state of the GATE_PRESENT parameter:

0 = The GATE_PRESENT parameter is set to 0, so the MPC does not support external gating.

1 = The GATE_PRESENT parameter is set to 1, so the MPC supports external gating.

[22:17] - - Reserved, RAZ/WI.
[16] CFG_GATE_RESP 0

When CTRL.GATE_PRESENT == 1, this bit enables software to control the AXI response type when the MPC is gating AXI transactions. The AXI response type is either:

0 = The MPC sets the AXI ready signals LOW, which stalls any AXI transactions.

1 = The MPC returns an AXI ERROR response.

Note:

If gating is active (CTRL.GATE_REQ == 1), then CTRL.CFG_GATE_RESP is read-only.

This bit is reserved when CTRL.GATE_PRESENT == 0.

[15:9] - - Reserved, RAZ/WI.
[8] INC_BLK_IDX 1

BLK_IDX autoincrement enable.

This bit is reserved when ADDR_WIDTH − BLK_CFG.BLK_SIZE < 11.

[7] GATE_ACK 0

This read-only bit indicates if the MPC is gating incoming AXI transactions:

0 = The MPC is not gating incoming AXI transactions.

1 = The MPC is not gating incoming AXI transactions.

This bit is reserved when CTRL.GATE_PRESENT == 0.

[6] GATE_REQ 0

Request to gate incoming AXI transactions.

Once the MPC enters configuration lockdown (CTRL.SEC_CFG_LOCK == 1), to avoid deadlock occurring the MPC sets GATE_REQ to 0.

This bit is reserved when CTRL.GATE_PRESENT == 0.

[5:0] - - Reserved, RAZ/WI.
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