7.4 Gating AXI transactions during register updates

If your MPC configuration supports the AXI transaction gating feature, then software can use the CTRL register to gate AXI transactions while it updates the MPC registers. The CTRL.GATE_PRESENT bit indicates whether an MPC configuration supports AXI transaction gating.

To prevent spurious memory protection behavior when software is updating the MPC registers, it can gate AXI transactions so that no transactions are active during the update. However, software cannot gate AXI transactions if it has set configuration lockdown.

The following steps show an example of using the AXI gating feature:

Procedure

  1. Set the CTRL.CFG_GATE_RESP bit to either:
    • 1. When the gating is enabled, the MPC returns a bus ERROR for each AXI transaction.
    • 0. When the gating is enabled, the MPC stalls each AXI transaction.
  2. Set the CTRL.GATE_REQ bit to 1, to request that the MPC enables AXI gating.
  3. Poll the CTRL.GATE_ACK bit until it is set to 1.
    When GATE_ACK == 1, the AXI gating is enabled.
  4. Reprogram the internal registers or LUT content.
  5. Clear the CTRL.GATE_REQ bit, to request that the MPC disables AXI gating.
  6. Poll the CTRL.GATE_ACK bit until it is set to 0.
    When GATE_ACK == 0, the AXI gating is disabled.
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