1.1. Floating-point support

The ARM processor core does not contain floating-point hardware. Instead floating-point can be done in one of three ways:

The software floating-point library (fplib), supplied as part of the RealView Developer Suite C library, provides functions that can be called to implement floating-point operations using no additional hardware. This is the default tools option and most systems have historically made use of this.
A hardware coprocessor attached to the ARM processor core that implements a number of instructions that provide the required floating-point operations. To date ARM has produced two such coprocessor architectures:
- Floating-point Accelerator (FPA), as used for example in the ARM7500FE. This is now obsolete.
- Vector Floating-Point (VFP), which was originally developed as part of the ARM10 program. This implements IEEE floating-point and supports single and double precision, but not extended precision.
Software Floating-Point Emulation (FPE), where code is still generated to use coprocessor floating-point instructions, but the actual coprocessor hardware does not exist in the system to implement them. Instead an emulation of the coprocessor is provided as system support code which is attached to the ARM processor core's undefined instruction trap.

In reality floating-point arithmetic in the FPA and (normally) the VFP is actually implemented using a combination of hardware (which executes the common cases) and software (which deals with the uncommon and exceptional cases). This does not apply when the VFP is operating in RunFast mode, when there is no trapping to support code (either for uncommon or exceptional cases) allowing complete hardware operation. See section 4 for more details of RunFast mode.

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