6.1. DMA peripheral map registers, SYS_DMAPSRx
The DMA map registers, SYS_DMAPSR0 to SYS_DMAPSR3, permit
the mapping of DMA channels 0, 1, and 2 to three of the external
peripherals.
Table 1. DMA map registers
| Name | Address | Access | Description |
|---|
| SYS_DMAPSR0 | 0x10000064 | Read/write | Controls mapping of external peripheral DMA request
and acknowledge signals to DMA channel 0. |
Table 2. SYS_DMAPSRx, DMA mapping register format
| Bit | Access | Description |
|---|
| [31:8] | - | Reserved. Use read-modify-write to preserve
value. |
| [7] | Read/write | Set to 1 to enable mapping of external periphjeral DMA
signals to the DMA controller channel. |
| [6:5] | - | Reserved. Use read-modify-write to preserve
value. |
| [4:0] | Read/write | FPGA peripheral mapped to this channel
b00000 = AACI Tx
b00001 = AACI Rx
b00010 = USB A
b00011 = USB B
b00100 = MCI 0
b00101 = MCI 1
b00110 = UART3 Tx
b00111 = UART3 Rx
b01000 = SCI Int A
b01001 = SCI Int B
b01010 to b11111 Reserved |
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