You can significantly reduce cycle counts by configuring the memory system correctly. Enabling the caches and storing state to a write-back memory region for Dormant Mode, or a write-through memory region for Shutdown Mode, speeds up low power mode entry and exit significantly. For Dormant Mode, the performance can be further improved using the cache lockdown feature to ensure the required data and instructions are always in the cache. Alternatively, storing state to the data TCM is another way to guarantee that every memory access hits in level 1 memory, reducing the cycle count.

A possible system level optimization to reduce the time required to enter and exit Dormant Mode when saving state into the level 1 data cache is to have a static, known memory setup specifically for the Dormant Mode entry and exit code. This allows memory configuration state, that can be up to 15 words, to be saved locally into the data cache rather than saving it to main memory. This optimization is only useful if both the original memory system and the Dormant Mode specific memory system define the region of memory used to store Dormant Mode state as write-back, so that it can be written into the data cache instead of main memory. This optimization is not useful for Shutdown Mode because the data cache contents are not preserved. This optimization is described in the ARM example code referenced in State to be Saved, and is enabled using the option DM_STATICMEM in that code. See the comments in the code for more details.

The example code is generic and can be used for many different implementation options, such as varying cache and TCM sizes, presence or absence of TCMs, DMA, and VFP, and inclusion of two additional coprocessors. For a specific implementation, many of these options are fixed, and the save and restore code can be optimized to match the implementation. For example, if you have no coprocessors or VFP, you can remove the code that tests for the presence of these and saves their state.

The example code assumes that all state is variable and must be saved and restored for Dormant or Shutdown Mode. In a real system, it is likely that on Reset the operating system sets up some aspects of the processor’s state that are static and never change. This static state does not need to be saved for Dormant or Shutdown Mode. On exit, the operating system can rerun the code that sets up this static state, and avoid reading state and long memory writes and reads.

There can be some state that is not necessary to save and restore because it controls a feature that is not used. In this case you can optimize the save and restore code so it does not save and restore this state. For example, if you never use the TLB lockdown feature, you can remove the code that saves and restores the TLB lockdown registers. This removes 32 MCR or MRC instructions on both entry and exit, as well as removing 24 word reads or writes to memory. Similarly, if you do not need to preserve the contents of TCMs when you enter Shutdown Mode, there is no need to write their contents to main memory. The example cycle counts show both examples: writing the contents of the TCMs to main memory and not writing the contents of the TCMs to main memory.