2.3. Stack and heap configuration

Configuring Stack and heap

The RealView Compilation Tools (RVCT) provide a number of methods of configuring the location for the stack and heap. The two main methods are to either re-implement the __user_initial_stackheap() function or to place the stack and heap in the scatter file using specific region names.

The tools also support two main types of stack and heap implementations, namely the one and two region models. In the one region model, the stack and heap share a single area of memory. The heap grows up from the bottom of the memory region while the stack grows down from the top.

In the two region model the heap and the stack each have their own memory region. The heap still grows upwards through memory and the stack still descends from the top of its region. Please refer to the RVCT Developer Guide and the RVCT Compiler and Libraries Guide for further information.

Note

You might want to use the MPU to place a region to detect overflows

One region model

If you are using the one region model the easiest way to place the stack and heap region in memory is in the scatter file. To do this you will need to use the special region name ARM_LIB_STACKHEAP in your scatter file with the address and size of the stack and heap region. See Example 6.

Example 6. Example one region model scatter file extract

;; Heap and stack share 1MBARM_LIB_STACKHEAP 0x20100000 EMPTY 0x100000{}

Note

EMPTY is used to indicate that it is intended that the region is not populated at link time.

The initial stack pointer value can then be placed using the linker-defined symbolImage$$ARM_LIB_STACK$$ZI$$Limit in the first entry, at 0x0, in your vector table.

Instead of using the special region name, you can re-implement the__user_initial_stackheap() function. However, you must still ensure that you correctly specify the initial SP value in your vector table. See the RVCT Developer Guide and RVCT Compiler and Libraries Guide for information on __user_initial_stackheap().

Two Region Model

To use the two region model you must specify two regions in the scatter file, one for the heap and one for the stack, that have special region names of ARM_LIB_HEAPand ARM_LIB_STACK. You also need to add either IMPORT __use_two_region_memoryfrom assembly language or #pragma import(__use_two_region_memory) from C. This specifies that you want to use the two region model and not the (default) one region model. See Example 7.

Example 7. Example two region model scatter file extract

; Heap starts at 1MB and grows upwardsARM_LIB_HEAP 0x20100000 EMPTY 0x100000-0x8000{}; Stack space starts at the end of the 2MB of RAM; and grows downwards for 32KB (indicated by the negative length)ARM_LIB_STACK 0x20200000 EMPTY -0x8000{}

The initial stack pointer value can then be placed using the linker-defined symbol Image$$ARM_LIB_STACK$$ZI$$Limit in the first entry, at 0x0 in your vector table.

Again, another way to place the stack and heap is by re-implementing __user_initial_stackheap() instead of using the special region. However, you must add the initial stack pointer to your vector table as before.

Eight byte stack alignment

The Application Binary Interface (ABI) for the ARM architecture requires that the stack must be eight-byte aligned on all external interfaces, such as calls between functions in different source files. However, code does not need to maintain eight-byte stack alignment internally, for example in leaf functions.

This means that when an interrupt or exception occurs the stack might not be correctly eight-byte aligned. Revision 1 and later of the Cortex-M3 silicon can automatically align the stack pointer when an exception occurs. This behavior must be enabled by setting STKALIGN (bit 9) in the Configuration Control Register at address 0xE000ED14.

If you are using revision 0 of the Cortex-M3, this adjustment cannot be performed in hardware. The compiler can generate code in your IRQ handlers that correctly aligns the stack. To do this you must prefix your IRQ handlers with __irq and use the --cpu=Cortex-M3-rev0 compiler switch, not --cpu=Cortex-M3.

Note

The --cpu=Cortex-M3-rev0 compiler switch is only supported in RVCT 3.0 SP1 (build 586) and later versions.

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