4.2.2. Exception state and endianness

In ARMv5, when an exception is entered, the first instruction to execute in the vector table must be an ARM instruction.

In ARMv7, however, when an exception is entered, the first instruction to execute in the vector table can be an ARM instruction or a Thumb-2 instruction. You can use the SCTLR.TE bit to control whether exceptions are taken in ARM or Thumb state.

In ARMv5, when an exception is entered, the exception is handled in whatever endian state the processor was already in. This means that the whole system must use the same endianness.

In ARMv7, however, when an exception is entered, a piece of code can use different endianness from the exception handlers. You can use the SCTLR.EE bit to control exception endianness. The SCTLR.EE bit defines the value of the CPSR.E bit on entry to an exception.

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