3.1.1. Monitor mode and Hypervisor mode registers

ARMv7-A introduces support for two more processor modes, Monitor (Mon) mode and Hypervisor (Hyp) mode, to support Security and Virtualization extensions respectively. Figure 3.1 shows the ARM register set in ARMv7-A.

Figure 3.1. The ARM register set

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As shown in Figure 3.1, the Mon mode and Hyp mode have the following banked registers, which do not exist in ARMv5:

Note

HYP mode shares the same LR with User or System mode.

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