4.9.1. Enabling Vector Floating-Point

The VFP extension is disabled at reset. Any attempt to execute a VFP instruction results in an Undefined Instruction exception being taken. To enable software to access VFP features, the following conditions must be satisfied:

In addition, software must set the FPEXC.EN bit to 1 to enable most VFP operations.

When VFP operation is disabled because FPEXC.EN is 0, all VFP instructions are treated as undefined instructions, except for execution of the following in privileged modes:

To use the FPU in Secure state only

To use the FPU in Secure state only, complete the following steps:

  1. Set the CPACR for access to CP10 and CP11, the FPU coprocessors:

    LDR r0, =(0xF << 20)
    
    MCR p15, 0, r0, c1, c0, 2
    
  2. Set the FPEXC.EN bit to enable the FPU:

    MOV r3, #0x4000000
    
    VMSR FPEXC, r3
    

To use the FPU in Secure state and Non-secure state

To use the FPU in Secure state and Non-secure state, complete the following steps:

  1. Set bits [11:10] of the NSACR for access to CP10 and CP11 from both Secure and Non-secure states:

    MRC p15, 0, r0, c1, c1, 2
    
    ORR r0, r0, #2_11<<10 ; enable fpu
    
    MCR p15, 0, r0, c1, c1, 2
    
  2. Set the CPACR for access to CP10 and CP11:

    LDR r0, =(0xF << 20)
    
    MCR p15, 0, r0, c1, c0, 2
    
  3. Set the FPEXC EN bit to enable the FPU:

    MOV r3, #0x40000000 
    
    VMSR FPEXC, r3
    
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