Migrating a software application from ARMv5 to ARMv7-A/R Application Note 425

Version: 1.0

Table of Contents

1. Introduction
1.1. What this document contains
1.2. Benefits of this migration
1.3. References and further reading
1.4. Feedback on content
2. ARMv7 architecture overview
2.1. ARMv7 architecture overview
3. ARMv5 and ARMv7 compared
3.1. Registers
3.1.1. Monitor mode and Hypervisor mode registers
3.1.2. System control coprocessor registers
3.1.3. Program status register
3.1.4. VFPv3 double-precision registers
3.2. ISA instructions
3.2.1. Thumb-2
3.2.2. VFPv3 and NEON
3.2.3. Other ARMv7 new instructions
3.2.4. Alignment
3.3. Exception model
3.3.1. Entry into Supervisor mode
3.3.2. Mon mode and Hyp mode
3.3.3. Secure state and Non-secure state
3.3.4. Privilege levels
3.4. Memory model
3.4.1. Memory management
3.4.2. Barriers
3.5. Synchronization
3.6. Multiprocessing
3.6.1. Cache
3.6.2. Translation Lookaside Buffers
3.6.3. Generic Interrupt Controller
3.7. Operating system support
3.7.1. Dual Translation Tables
3.7.2. Context saving
3.7.3. Address Space Identifiers
3.7.4. Generic Timer
3.7.5. Symmetric Multi-Processing
3.8. Floating-Point Unit
3.8.1. ARM VFP Architecture versions
3.8.2. VFP comparison between ARM926 and Cortex-A9
3.9. NEON
3.9.1. Supported data types
3.9.2. NEON registers
3.9.3. NEON instructions
3.9.4. Example: Swapping color channels
3.10. Virtualization
3.10.1. Relationship between Virtualization and Security Extensions
3.11. TrustZone
3.11.1. TrustZone hardware architecture overview
3.12. MP-core cache coherency
3.12.1. MESI and MOESI protocols
3.12.2. Snoop Control Unit
3.12.3. Cache Coherent Interface
4. Migrating a software application from ARMv5 to ARMv7-A/R
4.1. Changing startup code and set up MMU cache
4.1.1. V7 Cache and MMU setup code
4.1.2. Memory type mapping
4.2. Modifying exception-handling code
4.2.1. Vector Tables
4.2.2. Exception state and endianness
4.2.3. Exception return
4.2.4. Abort exception handling
4.2.5. Unaligned access support
4.2.6. Fault handling
4.3. Replacing ARMv5 barriers with equivalent ARMv7 barriers
4.3.1. Example of using barriers
4.4. Replacing ARMv5 synchronization primitives with equivalent ARMv7 synchronization primitives
4.5. [Optional] Implementing TrustZone to provide a robust security solution
4.5.1. Secure operating system
4.5.2. Synchronous library
4.5.3. Intermediate options
4.5.4. Booting a secure system
4.5.5. Booting Linux in a Non-secure state
4.6. [Optional] Using NEON to improve application performance
4.6.1. Enabling NEON
4.6.2. Assembler
4.6.3. Compiler intrinsics
4.6.4. Automatic vectorization
4.6.5. Matrix multiplication example
4.7. [Optional] Using Symmetric Multi-Processing to deliver higher performance
4.7.1. Booting
4.7.2. Programming
4.7.3. Synchronization primitives, locks, and semaphore
4.8. Choosing the right software development tools and debug adaptors
4.8.1. Tools selection
4.9. [Optional] Enabling FPU to improve application performance
4.9.1. Enabling Vector Floating-Point
4.9.2. Vector Floating-Point support in the ARM Compiler
4.9.3. Vector Floating-Point support in GCC
5. Migration notes
5.1. Migration notes

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Revision History
Revision A30 July 2014First release
Copyright © 2014 ARM. All rights reserved.ARM DAI0425