ARM7TDMI Technical Reference Manual(Rev 3)
Home > AC and DC Parameters > Synchronous interrupt timing

7.13. Synchronous interrupt timing

Figure 7.12 shows the ARM7TDMI processor synchronous interrupt timing. The timing parameters used in Figure 7.12 are listed in Table 7.12.

Figure 7.12. Synchronous interrupt timing

Table 7.12. Synchronous interrupt timing parameters

SymbolParameterParameter type
TsihSynchronous nFIQ, nIRQ hold from MCLKf with ISYNC=1Minimum
TsisSynchronous nFIQ, nIRQ setup to MCLKf, with ISYNC=1Minimum
Copyright © 1994-2001. All rights reserved.ARM DDI 0029G
Non-Confidential
PDF file icon  PDF version
Home > AC and DC Parameters > Synchronous interrupt timing