1.4. Timer Operation

The timer is loaded by writing to the load register and, if enabled, counts down to zero. When zero is reached, an interrupt is generated. The interrupt may be cleared by writing to the Clear register.

After reaching a zero count, if the timer is operating in free-running mode it continues to decrement from its maximum value. If periodic timer mode is selected, the timer reloads from the load register and continues to decrement. In this mode the timer effectively generates a periodic interrupt. The mode is selected by a bit in the Control register.

At any point, the current timer value may be read from the Value register.

The timer is enabled by a bit in the control register. At reset, the timer is disabled, the interrupt is cleared and the Load register is undefined. The mode and prescale value is also undefined.

Figure 1.3. Timer operation

The timer clock is generated by a prescale unit. The timer clock may be one of:

Figure 1.4. Prescale unit

Copyright © 1995-1997 ARM Limited. All rights reserved.ARM DDI 0049C
Non-Confidential