2.2. Coprocessor Interface Signals

Table 2.2. Coprocessor interface signal descriptions

NameTypeDescription
CPCLKOutCoprocessor ClockThis clock controls the operation of the coprocessor interface.
CPDATA[31:0]InOutCoprocessor Data BusData is transferred to and from the co-processor using this bus. Data is valid on the falling edge of CPCLK.
CPDBEInCoprocessor Data Bus EnableThis signal when HIGH, indicates that the co-processor intends to drive the co-processor data bus, CPDATA. If the coprocessor interface is not to be used then this signal should be tied LOW.
CPnWAITOutCoprocessor Not WaitThe coprocessor clock CPCLK is qualified by CPnWAIT to allow the ARM720T to control the transfer of data on the coprocessor interface.
CPTESTREADInCoprocessor Test ReadThis signal is used for test of a Piccolo coprocessor (if attached) and should only be used with the ARM720T held in reset. When HIGH, it enables DB to be driven on to CPDATA, and should normally be held LOW. It must never be asserted at the same time as CPTESTWRITE.
CPTESTWRITEInCoprocessor Test WriteThis signal is used for test of a Piccolo coprocessor (if attached) and should only be used with the ARM720T held in reset. When HIGH, it enables DB to be driven on to CPDATA, and should normally be held LOW. It must never be asserted at the same time as CPTESTREAD.
EXTCPAInExternal Coprocessor AbsentA coprocessor that is capable of performing the operation that ARM720T is requesting (by asserting nCPI) should take EXTCPA LOW immediately. If EXTCPA is HIGH at the end of the low phase of the cycle in which nCPI went LOW, ARM720T aborts the Coprocessor instruction and take the undefined instruction trap. If EXTCPA is LOW and remains low, ARM720T busy-waits until EXTCPB is LOW and then completes the coprocessor instruction.
EXTCPBInExternal Coprocessor BusyA coprocessor that is capable of performing the operation that ARM720T is requesting (by asserting nCPI), but cannot commit to starting it immediately, should indicate this by driving EXTCPB HIGH. When the coprocessor is ready to start it should take EXTCPB LOW. ARM720T samples EXTCPB at the LOW phases of each cycle in which nCPI is LOW.
nOPCInNot OPcode FetchWhen LOW, this signal indicates that the processor is fetching an instruction from memory. When HIGH, data (if present) is being transferred. This signal is used by the coprocessor to track the ARM pipeline.
nCPIOutNot Coprocessor InstructionWhen LOW, this signal indicates that the ARM720T is executing a coprocessor instruction.
nUSEROutNot User ModeWhen LOW, this signal indicates that the processor is in user mode. It is used by a coprocessor to qualify instructions.
TBITOutThumb ModeThis signal, when HIGH, indicates that the processor is executing the THUMB instruction set. When LOW, the processor is executing the ARM instruction set.
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