12.2. ARM720T Test Mode

The ARM720T test mode is used to test the functionality of the:

To perform this test control, stimuli are applied to the control register, see Table 12.3.

Data packets are read or written as appropriate and the address and status are read back (see Table 12.3.

The sequencing for this test mode is as shown in Figure 12.2. This is the default test mode, and is selected when the bits [31:29] of the control register are set LOW (see Table 12.3).

Figure 12.2. State machine for ARM720T and ARM7TDMI test

MCLKENABLE is an internal signal that controls the clocking of the ARM720T and is asscerted only in the DataIn and DataOut status.

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