3.7. Reset

When the BnRES signal goes LOW, ARM720T:

  1. Abandons the executing instruction.

  2. Flushes the Cache and Translation Lookaside Buffer.

  3. Disables the Write Buffer, Cache and Memory Management Unit.

  4. Resets the Process Identifier.

  5. Continues to fetch instructions from incrementing word addresses.

When BnRES goes HIGH again, ARM720T:

  1. Overwrites R14_svc and SPSR_svc by copying the current values of the PC and CPSR into them. The value of the saved PC and SPSR is not defined.

  2. Forces M[4:0] to 10011 (Supervisor mode), sets the I and F bits in the CPSR, and clears the CPSR’s T bit.

  3. Forces the PC to fetch the next instruction from the low reset exception vector.

  4. Resumes execution in ARM state.

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