7.8. Level 2 Descriptor

If the Level One fetch returns a Page Table Descriptor, this provides the base address of the page table to be used. The page table is then accessed as described in Figure 7.6, and a Page Table Entry, or Level 2 Descriptor, is returned. This in turn may define either a Small Page or a Large Page access. The figure below shows the format of Level 2 Descriptors.

Figure 7.5. Page table entry (Level 2 Descriptor)

The two least significant bits indicate the page size and validity, and are interpreted as follows:

Table 7.4. Interpreting page table entry bits 1:0

ValueMeaningNotes
0 0InvalidGenerates a Page Translation Fault
0 1Large PageIndicates that this is a 64KB Page
1 0Small PageIndicates that this is a 4KB Page
1 1Reserved Reserved for future use
Bit [2]

(B - Bufferable) indicates that data at this address is written through the write buffer (if the write buffer is enabled).

Bit [3]

(C - Cacheable) indicates that data at this address is placed in the IDC (if the cache is enabled).

Bits [11:4]

specify the access permissions (ap3 – ap0) for the four sub‑pages. Interpretation of these bits is described earlier in Table 7.2.

Bits [15:12]

are programmed as 0 for large pages

Bits [31:12]

(small pages)

Bits [31:16]

(large pages)

Note

Small and large pages are used to form the corresponding bits of the physical address, that is the physical page number. (The page index is derived from the virtual address as illustrated in Figure 7.6 and Figure 7.7).

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