7.3. Address Translation Process

The MMU translates virtual addresses generated by the CPU after relocation by the Process Identifier into physical addresses to access external memory, and also derives and checks the access permission. Translation information, which consists of both the address translation data and the access permission data, resides in a translation table located in physical memory.

The MMU provides the logic needed to:

There are three routes by which the address translation (and hence permission check) takes place. The route taken depends on whether the address in question has been marked as a section-mapped access or a page-mapped access; there are two sizes of page-mapped access (large pages and small pages). However, the translation process always starts out in the same way, as described below, with a Level One fetch. A section-mapped access only requires a Level One fetch, but a page-mapped access also requires a Level Two fetch.

Copyright © 1997, 1998 ARM Limited. All rights reserved.DDI 0087E
Non-Confidential