1.4.2. THUMB Instruction Set

This section gives an overview of the THUMB instructions available. For full details of these instructions, please refer to the ARM Architecture Reference Manual (ARM DDI 0100).

Format summary

The THUMB instruction set formats are shown in the following figure.

Figure 1.3. THUMB instruction set formats

THUMB instruction summary

The following table summarizes the THUMB instruction set

Table 1.2. THUMB instruction summary

MnemonicInstruction

Lo register

operand

Hi register

operand

Condition

codes set

ADCAdd with Carry 
ADDAdd  [1]
ANDAND 
ASRArithmetic Shift Right 
BUnconditional Branch  
BxxConditional Branch  
BICBit Clear 
BLBranch and Link   
BXBranch and Exchange 
CMNCompare Negative 
CMPCompare
EOREOR 
LDMIALoad Multiple   
LDRLoad Word  
LDRBLoad Byte  
LDRHLoad Halfword  
LSLLogical Shift Left 
LDSBLoad Sign-Extended Byte  
LDSHLoad Sign-Extended Halfword  
LSRLogical Shift Right 
MOVMove Register[2]
MULMultiply 
MVNMove Negative Register 
NEGNegate 
ORROR 
POPPop Registers  
PUSHPush Registers  
RORRotate Right 
SBCSubtract with Carry 
STMIAStore Multiple  
STRStore Word  
STRBStore Byte  
STRHStore Halfword  
SWISoftware Interrupt   
SUBSubtract 
TSTTest Bits 

[1] The condition codes are unaffected by the format 5, 12 and 13 versions of this instruction.

[2] The condition codes are unaffected by the format 5 version of this instruction.

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