| Copyright © 1997, 1998 ARM Limited. All rights reserved. | DDI 0087E |
| Non-Confidential | |
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| Home > Debug Interface > Scan Chains and JTAG Interface > The JTAG state machine |
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The process of serial test and debug is best explained in conjunction with the JTAG state machine. Figure 8.3 shows the state transitions that occur in the TAP controller. The state numbers are also shown on the diagram.
| Copyright © 1997, 1998 ARM Limited. All rights reserved. | DDI 0087E |
| Non-Confidential | |
| PDF version | |
| Home > Debug Interface > Scan Chains and JTAG Interface > The JTAG state machine |