8.10.3. Watchpoint with another exception

If a watchpointed access simultaneously causes a data abort, ARM7DMT enters debug state in abort mode. Entry into debug is held off until the core has changed into abort mode, and fetched the instruction from the abort vector.

A similar sequence is followed when an interrupt, or any other exception, occurs during a watchpointed memory access. ARM7DMT enters debug state in the exception’s mode, and so the debugger must check to see whether this happened. The debugger can deduce whether an exception occurred by looking at the current and previous mode (in the CPSR and SPSR), and the value of the PC. If an exception did take place, the user should be given the choice of whether to service the exception before debugging.

Exiting from debug state

Exiting debug state if an exception occurred is slightly different from the other cases.

Here, entry to debug state causes the PC to be incremented by three addresses rather than four, and this must be taken into account in the return branch calculation. For example, suppose that an abort occurred on a watchpointed access and ten instructions had been executed to determine this. The following sequence could be used to return to program execution:

0 E1A00000    ; MOV R0, R0
1 E1A00000    ; MOV R0, R0
0 EAFFFFF0    ; B -16

This forces a branch back to the abort vector, causing the instruction at that location to be refetched and executed.


After the abort service routine, the instruction which caused the abort and watchpoint is re-executed. This generates the watchpoint and ARM7DMT enters debug state again.

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