9.2.1. Programming and reading watchpoint registers

A register is programmed by scanning data into the EmbeddedICE scan chain (scan chain 2). The scan chain consists of a 38-bit shift register comprising:

This is shown in Figure 9.2.

Figure 9.2. EmbeddedICE block diagram

The data to be written is scanned into the 32-bit data field, the address of the register into the 5-bit address field and a 1 into the read/write bit.

A register is read by scanning its address into the address field and scanning a 0 into the read/write bit. The 32-bit data field is ignored. The register addresses are shown in Table 9.1.

Note

A read or write takes place when the TAP controller enters the UPDATE-DR state.

Copyright © 1997, 1998 ARM Limited. All rights reserved.DDI 0087E
Non-Confidential