9.3.1. Hardware breakpoints

To make a watchpoint unit cause hardware breakpoints (that is, on instruction fetches):

  1. To make a watchpoint unit cause hardware breakpoints (that is, on instruction fetches):

  2. Program the breakpoint bits as follows:

    ARM state

    set bits [1:0] of the Address Mask register to 1.

    THUMB state

    set bit 0 of the Address Mask to 1.

    In both cases, the remaining bits are set to 0.

  3. Program the Data Value register only if you require a data-dependent breakpoint: that is, only if the actual instruction code fetched must be matched as well as the address. If the data value is not required, program the Data Mask register to 0xFFFFFFFF (all bits to1), otherwise program it to 0x00000000.

  4. Program the Control Value register with nOPC = 0.

  5. Program the Control Mask register with nOPC =0, all other bits to 1.

  6. If you need to make the distinction between user and non-user mode instruction fetches, program the nTRANS Value and Mask bits as above.

  7. If required, program the EXTERN, RANGE and CHAIN bits in the same way.

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