9.4.1. Programming restriction

The EmbeddedICE watchpoint units should only be programmed when the clock to the core is stopped. This can be achieved by putting the core into the debug state.

The reason for this restriction is that if the core continues to run at ECLK rates when EmbeddedICE is being programmed at TCK rates, it is possible for the BREAKPT signal to be asserted asynchronously to the core.

This restriction does not apply if MCLK and TCK are driven from the same clock, or if it is known that the breakpoint or watchpoint condition can only occur some time after EmbeddedICE has been programmed.


This restriction does not apply to the Debug Control or Status Registers.

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