9.7.1. Example

Let

Av[31:0]

be the value in the Address Value Register.

Am[31:0]

be the value in the Address Mask Register.

A[31:0]

be the Address Bus from the ARM7DMT.

Dv[31:0]

be the value in the Data Value Register.

Dm[31:0]

be the value in the Data Mask Register.

D[31:0]

be the Data Bus from the ARM7DMT.

Cv[8:0]

be the value in the Control Value Register.

Cm[7:0]

be the value in the Control Mask Register.

C[9:0]

be the combined Control Bus from the ARM7DMT, other watchpoint registers and the EXTERN signal.

CHAINOUT signal

The CHAINOUT signal is then derived as follows:

WHEN (({Av[31:0],Cv[4:0]} XNOR {A[31:0],C[4:0]}) OR
{Am[31:0],Cm[4:0]} == 0x1FFFFFFFFF)
CHAINOUT = ((({Dv[31:0],Cv[7:5]} XNOR {D[31:0],C[7:5]}) OR
{Dm[31:0],Cm[7:5]}) == 0x7FFFFFFFF)

The CHAINOUT output of watchpoint register 1 provides the CHAIN input to Watchpoint 0. This allows for quite complicated configurations of breakpoints and watchpoints.

For example, consider the request by a debugger to breakpoint on the instruction at location YYY when running process XXX in a multiprocess system.

If the current process ID is stored in memory, the above function can be implemented with a watchpoint and breakpoint chained together. The watchpoint address is set to a known memory location containing the current process ID, the watchpoint data is set to the required process ID and the ENABLE bit is set to “off”.

The address comparator output of the watchpoint is used to drive the write enable for the CHAINOUT latch, the input to the latch being the output of the data comparator from the same watchpoint. The output of the latch drives the CHAIN input of the breakpoint comparator. The address YYY is stored in the breakpoint register and when the CHAIN input is asserted, and the breakpoint address matches, the breakpoint triggers correctly.

RANGEOUT signal

The RANGEOUT signal is then derived as follows:

RANGEOUT = ((({Av[31:0],Cv[4:0]} XNOR {A[31:0],C[4:0]}) OR
{Am[31:0],Cm[4:0]}) == 0xFFFFFFFFF) AND ((({Dv[31:0],Cv[7:5]}
XNOR {D[31:0],C[7:5]}) OR {Dm[31:0],Cm[7:5]}) == 0x7FFFFFFFF)

The RANGEOUT output of watchpoint register 1 provides the RANGE input to watchpoint register 0. This allows two breakpoints to be coupled together to form range breakpoints.

Note

Selectable ranges are restricted to being powers of 2.

Example

If a breakpoint is to occur when the address is in the first 256 bytes of memory, but not in the first 32 bytes, the watchpoint registers should be programmed as follows:

  1. Watchpoint 1 is programmed with an address value of 0x00000000 and an address mask of 0x0000001F. The ENABLE bit is cleared. All other Watchpoint 1 registers are programmed as normal for a breakpoint. An address within the first 32 bytes causes the RANGE output to go HIGH but the breakpoint is not triggered.

  2. Watchpoint 0 is programmed with an address value of 0x00000000 and an address mask of 0x000000FF. The ENABLE bit is set and the RANGE bit programmed to match a 0. All other Watchpoint 0 registers are programmed as normal for a breakpoint.

If Watchpoint 0 matches but Watchpoint 1 does not (that is,the RANGE input to Watchpoint 0 is 0), the breakpoint will be triggered.

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