9.8.2. Communications via the comms channel

Communication between the debugger and the processor occurs as follows.

  1. When the processor wishes to send a message to EmbeddedICE, it first checks that the Comms Data Write register is free for use.

  2. This is done by reading the Debug Comms Control register to check that the W bit is clear:

    • If it is clear, the Comms Data Write register is empty and a message is written by a register transfer to the coprocessor. The action of this data transfer automatically sets the W bit.

    • If it is set, this implies that previously‑written data has not been picked up by the debugger and the processor must poll until the W bit is clear.

  3. Because the data transfer occurs from the processor to the Comms Data Write register, the W bit is set in the Debug Comms Control register.

  4. When the debugger polls this register, it sees a synchronized version of both the R and W bit.

    • When the debugger sees that the W bit is set, it can read the Comms Data Write register and scan the data out.

    • The action of reading this data register clears the W bit of the Debug Comms Control register. At this point, the communications process may begin again.

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