The ARM940T EmbeddedICE unit contains logic that allows efficient single stepping through code. This leaves the hardware watchpoint comparators free for general use.

This function is enabled by setting bit 3 of the Debug Control register. The state of this bit should only be altered while the processor is in debug state. If the processor exits debug state and this bit is HIGH, the processor fetches an instruction, executes it, and then immediately re-enters debug state. This happens independently of the watchpoint comparators. If a system‑speed data access is performed while in debug state, the debugger must ensure that the control bit is clear first.