12.3. ARM940T timing parameters

Table 12.1. ARM940T timing parameters

Timing parameter

Description

Tbbigd

BIGENOUT output delay from BCLK falling

Tbbigh

BIGENOUT output hold time from BCLK falling

Tbcand

CPLATECANCEL output delay from BCLK falling

Tbcanh

CPLATECANCEL output hold time from BCLK falling

Tbcdnh

CPDIN[31:0] set up time to BCLK falling

Tbcdns

CPDIN[31:0] set up time to BCLK falling

Tbchsh

CHSDE[1:0]/CHSEX[1:0] hold time to BCLK falling

Tbchss

CHSDE[1:0]/CHSEX[1:0] setup time to BCLK falling

Tbcomd

COMMTX/COMMRX output delay

Tbcomh

COMMTX/COMMRX output hold time

Tbcpdd

CPID[31:0]/CPDOUT[31:0] output delay from BCLK falling

Tbcpdh

CPID[31:0]/CPDOUT[31:0] output hold time from BCLK falling

Tbcpkf

Delay from BCLK falling to CPCLK falling

Tbcpkr

Delay from BCLK rising to CPCLK rising

Tbctld

CPnMREQ/nCPTRANS/CPTBIT output delay from BCLK falling

Tbctlh

CPnMREQ/nCPTRANS/CPTBIT output hold time from BCLK falling

Tbdbqh

EDBGRQ input hold time from BCLK falling

Tbdbqs

EDBGRQ input setup time to BCLK falling

Tbdckd

DBGACK output delay

Tbdckh

DBGACK output hold time

Tbekf

Delay from BCLK falling to ECLK falling

Tbekr

Delay from BCLK rising to ECLK rising

Tbexth

EXTERN0/EXTERN1 input hold time from BCLK falling

Tbexts

EXTERN0/EXTERN1 input setup time to BCLK falling

Tbinth

nFIQ/nIRQ hold time from BCLK falling

Tbints

nFIQ/nIRQ setup time to BCLK falling

Tbisyh

ISYNC hold time from BCLK falling

Tbisys

ISYNC setup time to BCLK falling

Tbnwtd

CPnWAIT output delay from BCLK rising

Tbnwth

CPnWAIT output hold time from BCLK rising

Tbpasd

CPPASS output delay from BCLK rising

Tbpash

CPPASS output hold time from BCLK rising

Tbrg0d

RANGEOUT0 output delay

Tbrg0h

RANGEOUT0 output hold time

Tbrg1h

RANGEOUT1 output hold time

Tbrgqd

RANGEOUT1 output delay

Tbrst

Delay from nTRST falling to RSTCLKBS rising

Tbrtd

RSTCLKBS output delay from TCK falling

Tbrth

RSTCLKBS hold time from TCK falling

Tbtrks

TRACK input setup time to BCLK falling

Tbtrsh

TRACK input hold time from BCLK falling

Tcapf

ECAPCLKBS/ICAPCLKBS/PCLKBS falling from TCK rising

Tcapr

ECAPCLKBS/ICAPCLKBS/PCLKBS rising from TCK rising

Tdgid

DBGRQI output delay from TCK falling

Tdgih

DBGRQI output hold time from TCK falling

Tdih

TDI and TMS hold time from TCK rising

Tdis

TDI and TMS setup time to TCK rising

Tdqen

Delay from DBGEN falling to DBGRQI falling

Tdqir

Delay from nTRST falling to DBGRQI

Tedqd

DBGRQI output delay from EDBGRQ falling

Tedqh

DBGRQI output hold time from EDBGRQ falling

Tfbigd

BIGENOUT output delay from FCLK falling

Tfbigh

BIGENOUT output hold time from FCLK falling

Tfcand

CPLATECANCEL output delay from FCLK falling

Tfcanh

CPLATECANCEL output hold time from FCLK falling

Tfcdnh

CPDIN[31:0] set up time to FCLK falling

Tfcdns

CPDIN[31:0] set up time to FCLK falling

Tfchsh

CHSDE[1:0]/CHSEX[1:0] hold time to FCLK falling

Tfchss

CHSDE[1:0]/CHSEX[1:0] setup time to FCLK falling

Tfcpdh

CPID[31:0]/CPOUT[31:0] output delay from FCLK falling

Tfcpkf

Delay from FCLK falling to CPCLK falling

Tfcpkr

Delay from FCLK rising to CPCLK rising

Tfctld

CPnMREQ/nCPTRANS/CPT BIT output delay from FCLK falling

Tfctlh

CPnMREQ/nCPTRANS/CPTBIT output hold time from FCLK falling

Tfekf

Delay from FCLK falling to ECLK falling

Tfekr

Delay from FCLK rising to ECLK rising

Tffkf

Delay from FCLK falling to FCLKOUT falling

Tffkr

Delay from FCLK rising to FCLKOUT rising

Tfinth

nFIQ/nIRQ hold time from FCLK falling

Tfints

nFIQ/nIRQ setup time to FCLK falling

Tfisyh

ISYNC hold time from FCLK falling

Tfisys

ISYNC setup time to FCLK falling

Tfnwtd

CPnWAIT output delay from FCLK rising

Tfnwth

CPnWAIT output hold time from FCLK rising

Tfpasd

CPPASS output delay from FCLK rising

Tfpash

CPPASS output hold time from FCLK rising

Tirsd

IREG[3:0]/SCREG[3:0] output delay from TCK falling

Tirsh

IREG[3:0]/SCREG[3:0] hold time from TCK falling

Trgen

Delay from DBGEN falling to RANGEOUT0/RANGEOUT1 falling

Tsdnd

SDIN output delay from TCK falling

Tsdnh

SDIN hold time from TCK falling

Tshkf

SHCLK1BS/SHCLK2BS falling from TCK changing

Tshkr

SHCLK1BS/SHCLK2BS rising from TCK changing

Ttckf

TCK1/TCK2 falling from TCK changing

Ttckr

TCK1/TCK2 rising from TCK changing

Ttdod

TDO output delay from TCK falling

Ttdoh

TDO hold time from TCK falling

Ttdsd

TDO output delay from SDOUTBS changing

Ttdsh

TDO output hold time from SDOUTBS changing

Ttekf

Delay from TCK falling to ECLK falling

Ttekr

Delay from TCK rising to ECLK rising

Tteod

nTDOEN output delay from TCK falling

Tteoh

nTDOEN hold time from TCK falling

Ttpmd

TAPSM[3:] output delay from TCK falling

Ttpmh

TAPSM[3:0] hold time from TCK falling

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