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2.2.7. Register 6: Protection region base / size registers

This register can define 16 programmable regions (eight instruction, eight data) in memory. These registers define the base and size of each of the eight areas of memory. Individual control is provided for the instruction and data memory regions. The values are ignored when the protection unit is disabled.

On reset, only the region enable bit for each region is reset to 0, all other bits are undefined. At least one instruction and data memory region must be programmed before the protection unit is enabled including its size, base address, access permissions, cache and write buffer enables.

The opcode_2 field defines whether the data or instruction protection regions are to be programmed. The CRm field selects the region number.

Table 2.9. CP15 data protection region registers

ARM instructionProtection region register
MCR/MRC p15, 0, Rd, c6, c7, 0Data memory region 7
MCR/MRC p15, 0, Rd, c6, c6, 0Data memory region 6
MCR/MRC p15, 0, Rd, c6, c5, 0Data memory region 5
MCR/MRC p15, 0, Rd, c6, c4, 0Data memory region 4
MCR/MRC p15, 0, Rd, c6, c3, 0Data memory region 3
MCR/MRC p15, 0, Rd, c6, c2, 0Data memory region 2
MCR/MRC p15, 0, Rd, c6, c1, 0Data memory region 1
MCR/MRC p15, 0, Rd, c6, c0, 0Data memory region 0

Table 2.10. CP15 instruction protection region registers

ARM instructionProtection region register
MCR/MRC p15, 0, Rd, c6, c7, 1Instruction memory region 7
MCR/MRC p15, 0, Rd, c6, c6, 1Instruction memory region 6
MCR/MRC p15, 0, Rd, c6, c5, 1Instruction memory region 5
MCR/MRC p15, 0, Rd, c6, c4, 1Instruction memory region 4
MCR/MRC p15, 0, Rd, c6, c3, 1Instruction memory region 3
MCR/MRC p15, 0, Rd, c6, c2, 1Instruction memory region 2
MCR/MRC p15, 0, Rd, c6, c1, 1Instruction memory region 1
MCR/MRC p15, 0, Rd, c6, c0, 1Instruction memory region 0

Each protection region register has the format shown in Table 2.11.

Table 2.11. CP15 protection region register format 

Register bitFunction
31:12Base address
11:6Unused
5:1Area size
0Region enable. Reset to disable (0).

The region base must be aligned to an ‘area size’ boundary, where the area size is defined in its respective protection region register. The behavior is UNDEFINED if this is not the case.

Example base setting

An 8KB size region must be aligned to an 8KB boundary—bits [31:12] = 0x00002. Area sizes are given in Table 2.12.

Register 6 is discussed in Chapter 3 Protection Unit.

Table 2.12. Area size encoding 

Bit encodingArea size
00000 to 01010Reserved
010114KB
011008KB
0110116KB
0111032KB
0111164KB
10000128KB
10001256KB
10010512KB
100111MB
101002MB
101014MB
101108MB
1011116MB
1100032MB
1100164MB
11010128MB
11011256MB
11100512MB
111011GB
111102GB
111114GB
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