Joystick Interface Data Sheet Data Sheet A.2. Test Register Descriptions

A.2. Test Register Descriptions

Functions can be controlled within test mode using registers provided in the Joystick module. These registers are intended for test purposes only, and should not be used in normal operational use. The test registers are:

JOYTEST1: Joystick test register 1
JOYTEST2: Joystick test register 2
JOYTEST3: Joystick test register 3.

JOYTEST1 [5] (+0x020): Joystick test register 1

This register provides control over the clock source to the function while in test mode

Table A.2. JOYTEST1 bit functions

Bit	Name	Function
7-5	-	Not used.
4	Stop	Stop test clock. When set to 1, the strobe clock is stopped (gated out).
3	T	Test bit: enables counter test mode. When set, the four 16-bit counters are split into 4-bit parts, to shorten test times.
2:1	C[1:0]	Clock select bits X0 Normal operation. The input clock is selected. 01 PSEL ANDed with PSTB is driven as the internal clock. This means that when this clock source is selected, every access to the block generates a positive clock pulse internally. 11 The RC bit is used as the clock. Therefore to generate an internal clock transition you have to program this bit with the last written value inverted (ie. write 0 and then 1 creates a LOW to HIGH transition and vice versa)
0	RC	Registered clock bit. Can be used as a clock source when selected as described above.

JOYTEST2 [6] (+0x024): Joystick test register 2

This read-only register stores the current values of the module output signals.

Table A.3. JOYTEST2 bit functions

Bit	Name	Function
7-6	-	Not used.
5	J	Returns current value of JoyInt interrupt flag.
4	C	Returns current value of CompOn output signal.
3:0	S[3:0]	Returns current values of comparator outputs.

JOYTEST3 [5] (+0x028): Joystick test register 3

his write-only test register provides control of the module input signals. The table below, Table A.4, shows the bit details of the register.

Table A.4. JOYTEST3 bit functions

Bit	Name	Function
7:1	TESTS[3:0]	Registered comparator input bits used in test mode.
0	SEL	Mux Select line for use in test mode. When set to 1, selects the TestS bits for use internally. Otherwise the normal block inputs are used.

Bit

Name

Function

7:1

TESTS[3:0]

Registered comparator input bits used in test mode.

SEL

Mux Select line for use in test mode.

When set to 1, selects the TestS bits for use internally. Otherwise the normal block inputs are used.

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