| Copyright © 1997 ARM Limited. All rights reserved. | DDI 0095A |
| Non-Confidential | |
 PDF version | |
| Home > Test Registers > Test Registers > SMINPUTCTRL: Primary Inputs Test Register [5] (+0xCC) |
| |||
| Home > Test Registers > Test Registers > SMINPUTCTRL: Primary Inputs Test Register [5] (+0xCC) | |||
This register provides direct control of Smart Card Interface's primary inputs for test purposes.
Table A.4. SMINPUTCTRL register
| Bit | Name | Description |
|---|---|---|
| 0 | TICINPUTCTRL | When this bit is logic 1, the control of the smart card interface's primary inputs is given over to this register. |
| 1 | TICRCLK | TIC control bit for RCLK |
| 2 | TICSMDATAIN | TIC control bit for SMDataIn |
| 3 | TICSMCLKIN | TIC control bit for SMClkin |
| 4 | TICSMDETECT | TIC control bit for SMDetect |
| Copyright © 1997 ARM Limited. All rights reserved. | DDI 0095A |
| Non-Confidential | |
| PDF version | |
| Home > Test Registers > Test Registers > SMINPUTCTRL: Primary Inputs Test Register [5] (+0xCC) |