| Copyright © 1996-1998 ARM Limited. All rights reserved. | ARM DDI 0096B |
| Non-Confidential | |
 PDF version | |
| Home > Programmer’s Model > Register descriptions |
| |||
| Home > Programmer’s Model > Register descriptions | |||
The following registers are provided at offsets from a base address decoded to drive the PSEL input:
Control register
Status register
Transmit/receive data register
Clock division register
There are additional test registers described in Appendix A Test Harness.
| Copyright © 1996-1998 ARM Limited. All rights reserved. | ARM DDI 0096B |
| Non-Confidential | |
| PDF version | |
| Home > Programmer’s Model > Register descriptions |